The present invention relates to a pattern write control circuit for use in a display device having a color graphic display function. A conventional CRT display unit having a graphic display function includes a video RAM wherein data for turning on or off a dot on display coordinates is stored in a one-bit location of a memory cell. These memory cells are arranged to consist of a word, so that data read/write operation is performed on a word basis. Data write in such a video RAM generally requires various control operations of read, modification and write. More specifically, when a point of certain coordinates on a screen is to be turned on or off, the following sequence is followed (i) the memory address of the dot is calculated. (ii) The content at the calculated address is read out (in units of words). (iii) Among the read-out data of one-word, the bit corresponding to the coordinates is modified for turning on or off the dot. (iv) The bit-modified data of one word is written in the address from which the original data has been read out. Without the above operation, turning on or off the dot of the coordinates will change the surrounding dots of the coordinates.
In this manner, since various control operations of read, modification and write are conventionally involved in data write of a video RAM, the control procedures become complex. This increases the software load and requires a long period of time for data write. High performance of display systems of the type as described above has therefore been difficult to achieve. In a color graphic display device having a color display function, a video RAM must have a plurality of planes. For example, in the case of a 16-color display, four planes must be provided. Then, the above-mentioned control operations of one-word read, bit modification and one-word write must be performed for each of the four planes, further complicating the write procedures. In a conventional color graphic display device, when a graphic memory comprises four planes each plane having 16 kB (kilobyte) capacity, the CPU must have an address space of 16 kB.times.4=64 kB for accessing the graphic memory. This results in a long address calculation time for each plane.
Thus, a conventional color graphic display device requires a long time for pattern write, which prevents an improvement in system performance.
In order to allow color display in a larger number of colors, a color graphic display device having a tiling function has been proposed. A color graphic display device of higher class must provide a display in a larger number of colors. However, a conventional color graphic display device includes a video RAM which comprises three to four stages of memories each storing color data. For example, it can display a maximum of only 16 colors simultaneously with four stages of memories. According to the tiling function, a required portion is displayed solid with adjacent dots being displayed in different colors. Since the actual dots are considerably small, dots displayed in different colors appear in a mixed color at a distance from the screen. This function is called tiling since the procedure of writing dots of different colors resembles alternate fitting of tiles having different colors. Tiling is generally performed between two adjacent dots. This is because tiling in a range encompassing more than two dots degrades the obtained color shading and increases the software load for write control. By the tiling function of two adjacent dots on a display screen, an equivalent of three types of luminance for each color element can be achieved in three ways; the color element is lighted on both of two adjacent dots, it is lighted on either one dot of the two adjacent dots, and it is lighted on neither of them. Therefore, if a video RAM comprises three planes each having different color element data, 3.sup.3 =27 different colors are equivalently obtained. If a video RAM comprises four planes, 3.sup.4 =81 different colors are equivalently obtained. This requires a complex procedure when it is performed by software using known hardware. This is because the color must be changed for each dot and the task for performing this is designated in units of dots. Therefore, synthesis of data in the video RAM a screen before write operation of a dot and dot data to be written must be performed in a main memory. For this reason, when the conventional graphic display device is to incorporate a tiling function, a load on software is too great and processing speed is impaired.